This fascicle introduces a short project to implement a complete RISC-V microprocessor in the iCE40 FPGA, a 5k LUT FPGA in a miniature wafer-scale 2.15x2.50 mm WLCSP package.

 

Fascicle 01: Introduction to the RISC-V Processor Design Project.

Introduction and Overview of the RISC-V Processor Design Project, Using the iCE40 FPGA.

Step 00:
Fascicle 01 Material Pre-Assessment (click here to show/hide).
Step 01:
Step 02:

Read and annotate the chapter. Use ctrl +  to zoom in, ctrl -  to zoom out, and ctrl 0  to zoom back to initial size. You can highlight and annotate content in the document by selecting any text and clicking on the "Annotate" and "Highlight" tools that pop up. More information on how to use the site's annotation tools.

Step 03:
Fascicle 01 Self-Assessment Quiz 1 (click here to show/hide).
Fascicle 01 Self-Assessment Quiz 2 (click here to show/hide).
Fascicle 01 Self-Assessment Quiz 3 (click here to show/hide).
Fascicle 01 Self-Assessment Quiz 4 (click here to show/hide).
Fascicle 01 Self-Assessment Quiz 5 (click here to show/hide).
Step 04: Fascicle 00 Muddiest Point (click here to show/hide).

Related Content

 
P. Stanley-Marbell. "Fascicle 01: Introduction to the RISC-V Processor Design Project", Foundations of Embedded Systems (online), https://f-of-e.org/fascicle-01/. 
@article{f-of-e:Fascicle01,
  title = {Fascicle 01: Introduction to the RISC-V Processor Design Project},
  author = {Phillip Stanley-Marbell},
  booktitle = {Foundations of Embedded Systems},
  numpages = {11},
  url = {https://f-of-e.org/fascicle-01/}
  year={2020},
}
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